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  • 기업 IP
  • 대학·연구소 IP
  • N관련된 신규용역가능
  • M수정/가공 판매가능
  • T기술지원 가능
  • P현 상태로만 판매가능
total: 840/840 IP Cores
    • 대학·연구소 IP
    • P

    4H-SiC based ESD protection optimized for high voltage applications with Segment topology

    The circuit has effective ESD performance by using Lateral IGBT based Device. Also, the circuit has latch-up immunity as well as small area. The Electrical characteristics of ESD protection circuit are verified by using TLP system and ESD simulator (ESD pulse generator : it can generate the HBM, MM).

    KU302H1122 | 2021-12-01

    • 대학·연구소 IP
    • P

    4H-SiC based ESD protection optimized for high voltage applications with adjustable N+ region

    The circuit has effective ESD performance by using Lateral IGBT based Device. Also, the circuit has latch-up immunity as well as small area. The Electrical characteristics of ESD protection circuit are verified by using TLP system and ESD simulator (ESD pulse generator : it can generate the HBM, MM).

    KU302H1121 | 2021-12-01

    • 대학·연구소 IP
    • P

    4H-SiC based ESD protection optimized for high voltage applications with adjustable gate length

    The circuit has effective ESD performance by using Lateral IGBT based Device. Also, the circuit has latch-up immunity as well as small area. The Electrical characteristics of ESD protection circuit are verified by using TLP system and ESD simulator (ESD pulse generator : it can generate the HBM, MM).

    KU302H1120 | 2021-11-30

    • 기업 IP
    • N
    • M
    • T

    8Ch 10Bit GPADC

    This IP is the GPADC for TSMC 130nm MSRF G process. The operating temperature is -40 to 125 degrees. The resolution of ADC is 10Bit. The input supports 8 channels, with a maximum conversion rate of 10 MS/s. DNL and INL are less than ± 1 LSB and turn-on time is less than 10us.

    KC639H1115 | 2021-11-26

    • 기업 IP
    • N
    • M
    • T

    1.2V POR

    Power-On Reset (POR) 1.2V IP provides a fixed-width reset pulse to initialize the chip after supply power (1.2V). When the supply power is applied to 1V, the reset signal is output. Hysteresis of threshold voltage is 50mV, and assertion delay is 20us. POR 3.3V IP has low power operation characteristics of 2uA.

    KC639H1114 | 2021-11-26