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Physical Library > I/O > Standard I/O
  • 기업 IP
  • 대학·연구소 IP
  • N관련된 신규용역가능
  • M수정/가공 판매가능
  • T기술지원 가능
  • P현 상태로만 판매가능
total: 13/880 IP Cores
    • 대학·연구소 IP
    • P

    4H-SiC based ESD protection optimized for high voltage applications with Segment topology

    The circuit has effective ESD performance by using Lateral IGBT based Device. Also, the circuit has latch-up immunity as well as small area. The Electrical characteristics of ESD protection circuit are verified by using TLP system and ESD simulator (ESD pulse generator : it can generate the HBM, MM).

    KU302H1122 | 2021-12-01

    • 대학·연구소 IP
    • P

    4H-SiC based ESD protection optimized for high voltage applications with adjustable N+ region

    The circuit has effective ESD performance by using Lateral IGBT based Device. Also, the circuit has latch-up immunity as well as small area. The Electrical characteristics of ESD protection circuit are verified by using TLP system and ESD simulator (ESD pulse generator : it can generate the HBM, MM).

    KU302H1121 | 2021-12-01

    • 대학·연구소 IP
    • P

    4H-SiC based ESD protection optimized for high voltage applications with adjustable gate length

    The circuit has effective ESD performance by using Lateral IGBT based Device. Also, the circuit has latch-up immunity as well as small area. The Electrical characteristics of ESD protection circuit are verified by using TLP system and ESD simulator (ESD pulse generator : it can generate the HBM, MM).

    KU302H1120 | 2021-11-30

    • 대학·연구소 IP
    • P

    4H-SiC MOSFET-based ESD Protection Device with Improved Snapback using body floating for 70V application

    The circuit has effective ESD performance by using MOSFET based Device. Also, the circuit has latch-up immunity as well as small area. The Electrical characteristics of ESD protection circuit are verified by using TLP system and ESD simulator (ESD pulse generator : it can generate the HBM, MM).

    KU302H1077 | 2021-03-10

    • 대학·연구소 IP
    • P

    4H-SiC MOSFET-based ESD Protection Device with Improved Holding Voltage using gate floating for 80V application

    The circuit has effective ESD performance by using MOSFET based Device. Also, the circuit has latch-up immunity as well as small area. The Electrical characteristics of ESD protection circuit are verified by using TLP system and ESD simulator (ESD pulse generator : it can generate the HBM, MM).

    KU302H1076 | 2021-03-10